﻿#ifndef _Typedefs_h_
#define _Typedefs_h_

//C、C++常用库
#include <cassert>
#include <cfloat>
#include <climits>
#include <cmath>
#include <cstddef>
#include <cstdio>
#include <cstdlib>
#include <cstring>
#include <ctime>
#include <map>
#include <fstream>
#include <iostream>
#include <algorithm>
#include <complex>
#include <memory>
#include <string>
#include <stdarg.h>
#include <stdarg.h>
#include <sstream>
#include <io.h>
#include <vector>
#include "MacroDef.h"
#include "..\UE\UE_Tx_Front_FltC\common\head\NR_UL_macro.h"

using namespace std;

#define memcpy memmove 

//自定义类型
typedef double    real_t;
typedef double *  real_ptr;
typedef struct
{
    real_t re, im;
}  cmplx_t; //复数类型

typedef cmplx_t * cmplx_ptr;

typedef void *                   void_ptr;

typedef unsigned char            uint8;

typedef unsigned char *          uint8_ptr;

typedef unsigned short int       uint16;

typedef unsigned short int *     uint16_ptr;

typedef unsigned int             uint32;

typedef unsigned int *           uint32_ptr;

typedef unsigned long long int   uint64;

typedef unsigned long long int * uint64_ptr;

typedef char                     int8;

typedef char *                   int8_ptr;

typedef signed short int         int16;

typedef signed short int *       int16_ptr;

typedef signed int               int32;

typedef signed int *             int32_ptr;

typedef signed long long int     int64;

typedef signed long long int *   int64_ptr;

typedef uint8                    boolean;

#if (defined(WIN32) || defined(__WIN32) || defined(__WIN32__) || defined(WIN64) || defined(__WIN64) || defined(__WIN64__))&&(UL_MEX_FLAG==1)
#include <basetsd.h> //In windows, these type were defined in head file "basetsd.h"
#else//In other compilors, these type need be defined here
typedef unsigned char         UINT8;

typedef unsigned short int    UINT16;

typedef unsigned int          UINT32;

typedef signed char           INT8;

typedef signed short int      INT16;

typedef signed int            INT32;

typedef long long             INT64;

typedef unsigned long long    UINT64;

#endif
typedef double    Float;

typedef  short  fractN;
typedef  fractN * fractN_ptr;

typedef  int   fractM;
typedef  fractM * fractM_ptr;

typedef struct
{
	INT8 re,im;
}cmplx_frL;

typedef struct
{
    fractN re, im;
} cmplx_frN;

typedef  int   fractM18;
typedef struct
{
    fractM18 re, im;
} cmplx_frM18;

typedef cmplx_frN * cmplx_frN_ptr;

typedef struct
{
    fractM re, im;
} cmplx_frM;

typedef cmplx_frM * cmplx_frM_ptr;

typedef   int   fract2xN;

typedef fract2xN * fract2xN_ptr;

typedef  struct
{
    int  accw32;
    unsigned char accx8;
} fract40;

typedef fract40 * fract40_ptr;

typedef  struct
{
    fractM  accLo;
    int     accHi;
} fractLXM;

typedef fractLXM * fractLXM_ptr;

#define AL_TRUE              ((boolean)1)

#define AL_FALSE             ((boolean)0)

typedef struct
{
    //int32  iUe;
    //Common Control Parameters
    int32 FltFxpFlag;  //定浮点标志
    int32 AFC_Flag; //AFC使能,0不使能/1使能
    int32 ATC_Flag; //ATC使能,0不使能/1使能
    int32 PSS_SSS_DTFlag;  //PSS/SSS检测使能
    int32 PBCH_DTFlag;  //PBCH检测使能
    int32 PDCCH_DTFlag; //PDCCH检测使能
    int32 PDSCH_DTFlag; //PDSCH检测使能
    int32 CQI_Feedback_Flag;  //CQI反馈使能
    int32 RI_Feedback_Flag;  //RI反馈使能
    int32 Fixed_RI;  //初始RI或固定RI值
    int32 PMI_Feedback_Flag;  //PMI反馈使能,0不使能/1使能
    int32 RML_Flag; //RML解调使能
    int32 Start_n_TTI; // 仿真起始TTI序号
    int32 Runlength_TTI;  // 仿真TTI长度
    int32 iTTI;
    int32 MaxSCS; //所有小区中最大的子载波间隔（调度TTI按最大子载波间隔的SCS调度）
    int32 CellNum;  //小区个数
    int32 UENum; //UE个数
    int32 FftSize; //发端FFT Size
    int32 IdealEn; //理想信道估计使能
    int32 OversampFact;  //过采样因子
    real_t SNR;
    int32 nUe;
    int32 Scheduled_UE_Num;
    int32 Last_Scheduled_UE;
    int32 Scheduled_iUe;
    int32 rawbit_addr0;
    int32 DTYD_Print_Release; //DTYD_Print_Release

    //Cell-Specific Parameters
    int32 SCS_Num;  //小区中BWP个数
    int32 SCS[MAX_BWP_NUM]; //每个BWP的子载波间隔
    int32 CP_Type[MAX_BWP_NUM];  //各BWP的CP类型，只有60kHz支持ECP<td range>0（正常CP）/1（扩展CP）
    int32 SCS_RbNum[MAX_BWP_NUM];  //各BWP的RB个数
    int32 SCS_Start[MAX_BWP_NUM];  //各BWP的起始位置
    int32 N_cell_ID; //物理Cell ID，参考38.211（N_1_ID，N_2_ID由此计算）
    int32 SS_SCS; //SS块的SCS
    int32 SS_L; //半帧内实际发射SS块个数，参考38.213
    int32 SS_1stSymb_Idx[MAX_L];  //半帧内实际发射SS块第一个符号位置
    int32 SS_Burst_Period;  //实际SS Burst周期，参考RAN1 #88b，p64(UE初始接入检测按20ms)
    int32 SFN; //仿真起始系统帧号（MIB包含High Part，PBCH包含Low Part）
    int32 Half_Frame_Indication;  //半帧指示
    int32 SS_beta; //SS缩放因子，参考38.211
    int32 CHBW;  //小区的系统带宽Channel Bandwidths
    int32 RecFftSize;  //收端15kHz子载波间隔下的FFT Size
    int32 SFI; //SFI，参考38.211
    int32 CsiRsNum;                 //CsiRsNum<=MAX_CSI_NUM
    int32 CsiScsIdx[MAX_CSI_NUM]; //行：cell，列：CSI-RS个数，对应的Csi-Rs的SCS index
    int32 N_Csi_SCID[MAX_CSI_NUM];    //csi scrambling ID
    int32 CsiPortNum[MAX_CSI_NUM]; //行：cell，列：CSI-RS个数，对应的Csi-Rs发射天线端口数
    int32 Csi_LocationIdx[MAX_CSI_NUM];
    int32 Csi_k0[MAX_CSI_NUM];
    int32 Csi_k1[MAX_CSI_NUM];
    int32 Csi_k2[MAX_CSI_NUM];
    int32 Csi_k3[MAX_CSI_NUM];
    int32 Csi_k4[MAX_CSI_NUM];
    int32 Csi_k5[MAX_CSI_NUM];
    int32 Csi_l0[MAX_CSI_NUM];
    int32 Csi_l1[MAX_CSI_NUM];
    int32 Csi_Density[MAX_CSI_NUM];
    int32 Csi_CDMType[MAX_CSI_NUM];
    int32 Csi_StartRB[MAX_CSI_NUM];
    int32 Csi_RBNum[MAX_CSI_NUM];
    int32 Csi_RBcfg[MAX_CSI_NUM][MAXRBNUM];
    int32 Csi_Periodicity[MAX_CSI_NUM];
    int32 Csi_Toffset[MAX_CSI_NUM];
    int32 Csi_Powfactor[MAX_CSI_NUM];
    uint16 CSIRS_A[MAX_CSI_NUM];
    uint8  CSIRS_FltFxpFlag;
    // int32 Csi_N1[MAX_CSI_NUM];
    int32 PhyTxNum;  //每个Cell的物理天线数
    int32 CellFreqOffset;  //接收频偏Hz
    int32 CellChanCorrInd;  //小区天线相关性
    int32 PDSCH_DMRS_TypeA_Pos;  //第一个PDSCH DMRS符号位置
    int32 FrontDMRS_SymbNum; //前置DMRS的列数，取值范围为1或2
    int32 PDSCH_DMRS_mapping_Type; //PDSCH DMRS mapping类型，参考38.211
    int32 n_s;
    int32 n_s_f;
    int32 n_SCID; //n_SCID，参考38.211
    int32 N_SCID_ID;
    int32 Data_scrambling_Identity;
    int32 N_ID;//PDCCH-DMRS-Scrambling-ID
    int32 CDMGroupsNum;
    //int32 PrintCDMGroupsNum;
    int32 DMRSPortsNum;
    int32 DMRSPorts[MAX_DMRS_PORT_NUM];
    double *DMP_Table;
    int32 NOh;

    //UE-Specific Parameters
    int32 CellUEInd;  //Cell发送对应UE的指示
    int32 UeScsIdx;  //业务子载波在SCS中的序号
    //int32 CP_Type;
    int32 PDSCH_DMRS_Group;  //PDSCH DMRS类型，参考38.211
    int32 PDSCH_DMRS_Add_Pos;  //PDSCH DMRS额外符号个数，参考38.211
    //int32 PDSCH_DMRS_Symb_Num;
    int32 PDSCH_StartSymbol;  //PDSCH起始符号，参考38.211(TBD)
    int32 PDSCH_Int_Symb_Unit;
    int32 PDSCH_PRB_Bundling;  //PRB_Bundling大小，参考38.213

    //PDCCH
    int32 PDCCH_Monitor_Period;  //PDCCH检测周期，参考38.213
    int32 DCI_Period;  //DCI周期
    int32 Pdcch_enable;
    int32 CoreSet_Num;  //CoreSet个数，参考38.211
	int32 CoreSet_ID[MAX_CORESET_NUM];    // CORESET ID
	int32 CoreSet_StartSymbol[MAX_CORESET_NUM];  //PDCCH起始符号，参考38.213
    int32 CoreSet_Symb_Num[MAX_CORESET_NUM];    //{1,2,3}  3 onlyif N_RB_DL<=X
    int32 PDCCH_num[MAX_CORESET_NUM];  //PDCCH聚合等级
	int32 PDCCH_candidate_Num[MAX_AL_NUM]; //不同聚合等级的盲检候选数
	int32 PDCCH_Max_monitored_Num; //最大盲检次数限制
    int32 PDCCH_index;
    int32 PDCCH_AL[MAX_CORESET_NUM*MAX_PDCCHNUM_CORESET];  //PDCCH聚合等级,假设每个Coreset内最多4个PDCCH
    int32 PDCCH_m[MAX_CORESET_NUM*MAX_PDCCHNUM_CORESET];  //PDCCH发射位置,假设每个Coreset内最多4个PDCCH
    int32 CoreSet_Mapping_Type[MAX_CORESET_NUM];   //CCE to REG mapping, 0: non-interleaving,  1: interleaving
    // modified by 38.212 v2.0.0, 2018-01-18
    int32 CoreSet_Interleaver_Size[MAX_CORESET_NUM];     // R value,(2,3,6)
    int32 CoreSet_Shift_Index[MAX_CORESET_NUM];          // n_shift, f(cell_id) or [0,1,...,274]
    int32 CoreSet_Precoder_Granularity[MAX_CORESET_NUM]; // CORESET or CCE_AL
    // end of "modified by 38.212 v2.0.0, 2018-01-18"
    int32 CoreSet_REG_bundle_size[MAX_CORESET_NUM];   //L value
    int32 CoreSet_RB_Num[MAX_CORESET_NUM];
    int32 CoreSet_RB_Assignment[MAX_CORESET_NUM][MAXRBNUM];  //Coreset 的RB分配
    int32 PDCCH_Payload_K[MAX_CORESET_NUM * MAX_PDCCHNUM_CORESET]; //PDCCH Payload长度
    int32 crc_result[MAX_CORESET_NUM * MAX_PDCCHNUM_CORESET];
    uint32 PDCCH_Payload_Info[MAX_CORESET_NUM][10];  //PDCCH Payload信息比特
    int32 N_ID_PDCCH[MAX_CORESET_NUM * MAX_PDCCHNUM_CORESET];
    int32 n_ID_PDCCH[MAX_CORESET_NUM * MAX_PDCCHNUM_CORESET];
    int32 n_RNTI_PDCCH[MAX_CORESET_NUM * MAX_PDCCHNUM_CORESET];
    int32 CoreSet_by_PBCH;  //Flag for CoreSet configured by PBCH/SIB1。取值：1 for CoreSet configured by PBCH/SIB1, 0 for others
    int32 PDSCH_DMRS_Scrambling_ID;
	uint32 PDCCH_DMRS_CInit[MAX_PDCCH_SYM_NUM];
    uint16 PDCCH_DMRS_A;
    uint16 PDCCH_A;
    //int32 CORESET_REG_bundle_Assignment[MAX_CORESET_NUM][MAX_REGBUNDLE_NUM][MAXRBNUM];
    uint16 PDCCH_BlindDecode_Flag;
	int32 PDCCH_RuuProcMod[2];
	int16 PDCCH_CFR_Mod;
	int8  n_sb_shift_ipcore;
	int32 PDCCH_FrontDMRS_SymbNum;
    UINT8 ucPolarDccModel; // 0:NRToolBox, 1:AsicMModel1, 2:AsicMModel2, 3:CattCModel, 4:CevaCModel, 5:XilinxCModel
    UINT16 XilinxPolarFalseDetPmThresh; // 虚检判断门限,Q(16,1)
    int32 UE_CSI_Idx;  //CSI-RS
    int32 PMI_Type; // 1: Type 1 single panel 2: Type 1 multi panel 3: Type 2
    int32 PMI_CodeBookMode; // 1:MODE 1 2:MODE2
    int32 PMI_N1;   //PMI parameter
    int32 PMI_Ng;   //PMI parameter
    int32 CSI_SubBandSize;    //子带的RB个数
	UINT8 MIMO_Method;

    //PDSCH
    int32 PortIndex;  //端口起始索引
    int32 RB_Assignment[MAXRBNUM];  //RB分配
    int32 RB_Layer[MAXRBNUM];
    uint16 PDSCH_DMRS_A;
    uint16 PDSCH_A;
    //int32 MCS0;
    //int32 MCS1;
    int32 MIMO_MOD; //MIMO模式
    int32 CwNum; //码字数目
    int32 ModScheme0;  //码字0 ModScheme
    int32 ModScheme1;  //码字1 ModScheme
    int32 RB_Num;
    int32 PdschIntlvEn;
    int32 VrbStart;
    int32 PDSCH_ConfigByCORESET0; //PDSCH_ConfigByCORESET0
    //= PDSCH-LDPC UE 参数==//
    int    iUe;          // UE编号，用于区分不同用户的HARQ存储地址
    int    MaxLayerNum; // maximum number of layers for one TB supported by ue for the serving cell, 38.212  ->5.4.2.1
    int    MaxQm;       // maximum modulation order configured for the serving cell
    int    MaxnPRB;     // maximum number of PRBs across all configured BWPs of a carrier
    int    I_LBRM;      // I_LBRM=1时，Ncb=min(N,Nref),else Ncb = N
    //= PDSCH-LDPC 码字参数 ==//
    //int   Qm[MAX_CW_NUM];//  ( Qm ){ModScheme0,ModScheme1}
    int32  TBS_UserDefined[MAX_CW_NUM]; // debug模式：自定义TBS，用于特定TBS测试，<=0 无效，>0时不使用ldpc参数模块自定义计算的TBS
    float  fRate[MAX_CW_NUM];//  ( Rate )
    UINT8  ucReTxFlag[MAX_CW_NUM];  //0 初传 1重传
    UINT8  ucRv[MAX_CW_NUM]; // Rv版本号{0,1,2,3}
    UINT8  ucHarqIdx[MAX_CW_NUM];      // HARQ ID
    uint8 aucNotTransFlag[MAX_CW_NUM][MAX_CB_NUM]; //38.212  ->5.4.2.1
    int32 PDSCH_BitLen[MAX_CW_NUM]; // PDSCH bit number in one Slot
    int32 PdschBitLen2Tbs[MAX_CW_NUM]; //PDSCH用于计算TBS的bit长度
    //===//

    //Channel Parameters
    int32 TxNum;  //PDSCH发射天线端口数
    int32 Cell2UEDip;  //不同Cell到不同UE的路损，单位dB
    int32 ChannelType;  //信道类型，参考38.901，注意EPA、EVA、ETU模型时DS_desired失效
    int32 DS_desired;  //Scaling of delays，参考38.901
    int32 DopplerSpread;  //最大多普勒扩展
    int32 TimeOffset;  //时间偏移
    int32 UeFreqOffset;  //接收频偏Hz
    int32 RxNum;  //UE接收天线数
    int32 UeChanCorrInd;  //UE天线相关性
    int32 RNTI;  //识别号
	INT32  auwRxRNTI[POLAR_MAX_RNTI_NUM]; //Polar译码需要尝试的RNTI
    int32 CQI_Support256QAM;//UE是否支持256QAM的指示，决定了MCS表格不一样
    // added for Ruu estimation 2018-03-15
    int    MIMO_Noise_Ideal_En; //是否支持IRC功能
    int32  pdcch_rb_table[MAXRBNUM];
    // end of "added for Ruu estimation 2018-03-15"
    // added for phase compensation 2018-08-15
    cmplx_frN phase_compensation_coeff[100][200];
    // end of "added for phase compensation 2018-08-15"
    // added for pdsch interleaved/non-interleaved VRB-to-PRB mapping @20181129
    uint16  Vrb2PrbMap[MAXRBNUM];
    uint16  Prb_Scheduled_Sort[MAXRBNUM];
    // enf of "added for pdsch interleaved/non-interleaved VRB-to-PRB mapping"@20181129
    //DAS
    int32 CCH_Symb_Num;
    int32 Indoor_Distribution_System_EnFlag;
    int32 SSB_PRB_Shift;
    int32 SS_k0;
    int32 Ssb1Index;
    int32 Ssb0Index;
    int32 Ssb1En;
    int32 Ssb0En;
	int32 Data_Tool_Source;//1：DTYD向量时域数据打桩分析；2：外场抓取数据打桩分析
	int   AL_Num;
    char  CaseName[512];
	uint8 SimFinishFlag;
	int   TRSNum;
} stParamTable;
typedef struct
{
    //Common Control Parameters
    int32 FltFxpFlag; //定浮点标志
    int32 AFC_Flag;  //AFC使能,0不使能/1使能
    int32 ATC_Flag;  //ATC使能,0不使能/1使能
    int32 CQI_Feedback_Flag; //CQI反馈使能
    int32 RI_Feedback_Flag; //RI反馈使能
    int8  Fixed_RI;  //初始RI或固定RI值
    int8  Fixed_PMI;
    int8  PRBGroupRBNum; // default value 8
    int32 PMI_Feedback_Flag; //PMI反馈使能,0不使能/1使能
    //int32 RML_Flag;
    int32 Start_n_TTI; // 仿真起始TTI序号
    int32 Runlength_TTI; // 仿真TTI长度
    int32 iTTI;
    int32 MaxSCS;  //所有小区中最大的子载波间隔（调度TTI按最大子载波间隔的SCS调度）
    int32 CellNum;  //小区个数
    int32 UENum;  //UE个数
    int32 FftSize;  //发端FFT Size
    int32 IdealEn;  //理想信道估计使能
    int32 OversampFact; //过采样因子
    int32 SNR;
    //Cell-Specific Parameters
    int32 SCS_Num; //小区中BWP个数
    int32 SCS[MAX_BWP_NUM];  //每个BWP的子载波间隔
    int8  CP_Type[MAX_BWP_NUM]; //各BWP的CP类型，只有60kHz支持ECP<td range>0（正常CP）/1（扩展CP）
    int32 SCS_RbNum[MAX_BWP_NUM]; //各BWP的RB个数
    int32 SCS_Start[MAX_BWP_NUM]; //各BWP的起始位置
    int8  SCS_k0[MAX_BWP_NUM];
    int32 N_CELL_ID;  //物理Cell ID，参考38.211（N_1_ID，N_2_ID由此计算）
    int32 N_PUSCH_ID;                   // if configured, N_ID_RS = N_PUSCH_ID, otherwise N_ID_RS = N_CELL_ID
    uint8 PUSCH_ID_En;                  // 1: N_PUSCH_ID, 0:N_CELL_ID
    int32 N_ID_SCID;                    // {0,1,...,65535}, CP
    int8  N_SCID;                       // {0,1}, CP
	uint8 FR_Flag; // 0 - FR1, 1 - FR2

    int32 SFN;  //仿真起始系统帧号（MIB包含High Part，PBCH包含Low Part）
    int32 Half_Frame_Indication;  //半帧指示
	int   N_Slot_Frame;//每帧的slot个数。
    int32 CHBW; //小区的系统带宽Channel Bandwidths
    int32 RecFftSize; //收端15kHz子载波间隔下的FFT Size
    int8  SFI; //SFI，参考38.211
    int32 PhyTxNum; //每个Cell的物理天线数
    int32 CellFreqOffset; //接收频偏Hz
    int32 CellChanCorrInd; //小区天线相关性
    int8  NR_Release_Flag;//  NR协议版本控制标示,0:协议版本2018.03; 1:协议版本2018.06. 2:f200基线 //added by guobaojuan,20180910
    //UE-Specific Parameters
    int32 CellUEInd; //Cell发送对应UE的指示
    int32 UeScsIdx;  //业务子载波在SCS中的序号
    int8  UeWaveFlag;
    int32 PUSCH_EnFlag;
    int32 PUCCH_EnFlag;
    int32 PRACH_EnFlag;
    int32 SRS_EnFlag;
    double PUSCH_Beta;
    double PUSCH_DMRS_Beta;
    double PUCCH_Beta;
    double SRS_Beta;
    double PRACH_Beta;

    //PUSCH
    //int32 MCS0;
    //int32 MCS1;
    //= PUSCH-LDPC UE 参数==//
    int    iUe;          // UE编号，用于区分不同用户的HARQ存储地址
    int    MaxLayerNum; // maximum number of layers for one TB supported by ue for the serving cell, 38.212  ->5.4.2.1
    int    MaxQm;       // maximum modulation order configured for the serving cell
    int    MaxnPRB;     // maximum number of PRBs across all configured BWPs of a carrier
    int    I_LBRM;      // I_LBRM=1时，Ncb=min(N,Nref),else Ncb = N
    //= PUSCH-LDPC 码字参数 ==//
    //int   Qm[MAX_CW_NUM];//  ( Qm ){ModuMod}
    float  fRate[MAX_CW_NUM];//  ( Rate )
    UINT8  ucReTxFlag[MAX_CW_NUM];  //0 初传 1重传
    UINT8  ucRv[MAX_CW_NUM]; // Rv版本号{0,1,2,3}
    UINT8  ucHarqIdx[MAX_CW_NUM];      // HARQ ID
    uint8 aucNotTransFlag[MAX_CW_NUM][MAX_CB_NUM]; //38.212  ->5.4.2.1
    int    PUSCHData_BitLen[MAX_CW_NUM]; //SCH bit长度
    int    PUSCHData_BitLen_ForTBS[MAX_CW_NUM]; //SCH 用于算TBS的bit长度，N_RE*Qm*LayerNum,38.214->6.1.4
    //=== ldpc可灵活配置参数（未配置时，按照接口定义的默认值使用）
    UINT8  ucReCBGFlag; // 0-使用TBG重传  1-使用CBG重传
    int32  TBS_UserDefined; // debug模式：自定义TBS，用于特定TBS测试，<=0 无效，>0时不使用ldpc参数模块自定义计算的TBS
    UINT8  MaxIterNum;  // 译码支持的最大迭代次数，自研ldpc默认值为15，ldpc ip核默认值为8
    UINT8  ucDecType;   // default:LDPC_NMS
    float  fNMS_coef;   // NMS译码时，minllr乘的系数，建议取值范围0~1，默认值0.75
    UINT8  ucChkMethod; // default:浮点SOFT:0， 定点HARD:2，ip核:4 //0-CRC，1-LDPC，2-CRC+LDPC, 3-LDPC+硬判无变化， 4- 无提前终止
    int    ldpc_turbo_flag; //0-ldpc 1-turbo
    //===//
    int    PUSCH_Xoh_PerPRB;
    int    PUSCHMultiFlag;   //PUSCH复用和解复用使能 1 打开 0 关闭,由参数计算
    //int32 MIMO_MOD;
    int8  CwNum;  //码字数目
    int8  CW_Idx;
    int8  ModuMod[2];
    int8  PUSCH_Map_Type;
    int8  PUSCH_DMRS_Group;
    int8  PUSCH_DMRS_PortIdx[12];
    int32 PUSCH_Int_Symb_Unit;
    int8  PUSCH_DMRS_typeA_Pos;
    uint8 PUSCH_DMRS_Add_Pos; // DMRS附加导频位置数
    int8  PUSCH_DMRS_SymNum;  // 每个位置的DMRS占用的符号数：1 or 2
    int8  DMRS_ColInOneSlot;  // DMRS前置和附加导频位置数 = PUSCH_DMRS_Add_Pos+1
    int8  DMRS_SCH_Combin; // 由参数计算
    int8  DMRS_CDM_GroupNum; // for all UE
    int   PUSCH_DMRS_Ncs;                       // Cyclic shift param in 3GPP TS 38.211
    uint8 RA_Type;
    int  PUSCH_RB_Num;
    int  PUSCH_VRB_START;/* 211中的参数k0 */
    uint8 PUSCH_Symb_Start;/* 211中的参数l0，后续会确定下来 */
    int8  PUSCH_SymNum;
    int8    CodebookBasedEn; // precoding, 1 - enable, 0 - disable
    int     CPE_En;

    // need to be calculated in paramgen
	int8    TxMcodeEnabled;
    int8    LayerNumOf1cw[2];
    int32   P_CiniForScram[2];
    int8    P_Alpha2;
    int8    P_Alpha3;
    int8    P_Alpha5;
    int8    PUSCH_Data_SymNum; // PUSCH symbol number in one Slot
    int32   PUSCH_RE_Num;           // RE number
    int32   QAM_SymNum[MAX_CW_NUM];         // QAM symbol number
    int8    DMRS_NumInOneSlot; // DMRS symbol number in one Slot = DMRS_ColInOneSlot*PUSCH_DMRS_SymNum
    int32   PUSCH_BitLen[2]; // PUSCH bit number in one Slot
    uint8   u8_DMRS_Pos[MAXSYMNUM]; // 1 - DMRS; 0 - PUSCH
    uint8   DMRS_SymIdx[RS_NUM_PER_TTI_UL]; // DMRS symbol index DMRS导频位置的符号index
    int     PUSCH_DMRS_CfgIdx;
    uint8   RB_BitMap[MAXRBNUM]; // 1 - Data RB, 0 - NULL RB
    int16   PUSCH_RB_Idx[MAXRBNUM]; // the real PUSCH_RB_Idx in PRB
    int16   PUSCH_iRB2RBIdx[MAXRBNUM];// PRB to RBIdx
    int8    CHEFDMode;   //added zhangyanqun@20180305 for gnb_rx_che_ls
    int     PUSCH_DMRS_uIdx[RS_NUM_PER_TTI_UL];
    int     PUSCH_DMRS_vIdx[RS_NUM_PER_TTI_UL];
    int     PUSCH_DMRS_q[RS_NUM_PER_TTI_UL]; //added zhangyanqun@20180823 for fpga MT
    uint8   PUSCH_SCH_Flag;
    int32   PUSCH_SCH_B_Len[MAX_CW_NUM];           // sch paylaod+crc length used
	int8    compval_EnFlag; // 频域平坦度基带补偿开关：1 - 打开, 0 - 关闭

    uint8   PUSCH_HARQ_Flag;
    int16   PUSCH_HARQ_A_Len;
    int16   PUSCH_HARQ_K_Len;
    int16   PUSCH_HARQ_E_Len;
    int16   PUSCH_HARQ_E_Len_RESERVE;
    uint8   PUSCH_HARQ_POLAR_T;

    //uint8   PUSCH_CSI_Flag;
    uint8   PUSCH_CSI1_Flag;
    int16   PUSCH_CSI1_A_Len;
    int16   PUSCH_CSI1_K_Len;
    int16   PUSCH_CSI1_E_Len;
    uint8   PUSCH_CSI1_POLAR_T;

    int8  HopMod;                       // 0 - no seq hop no group hop, 1 - no seq hop, 2 - no group hop
    int8  frequencyHoppFlag;      // 0 - no  frequencyHopp  1 -  intraSlot, 2 - interSlot  added by cyp
    int   PUSCH_VRB_Offset; // RB_Offset in 38.214
    int   PUSCH_RB_Offset[14]; // RB_Offset of every symbol
    uint8 N_Hop_PUSCH; // N_Hop_PUSCH in 38.212, the default value is 2
    int16   PUSCH_HARQ_E_Len_HopEn[2]; // [0] - first hop, [1] - second hop
    int16   PUSCH_CSI1_E_Len_HopEn[2]; // [0] - first hop, [1] - second hop
    int16   PUSCH_HARQ_E_Len_RESERVE_HopEn[2]; // [0] - first hop, [1] - second hop
    int16   PUSCH_l_sch_HopEn[2]; // [0] - first hop, [1] - second hop
    int16   PUSCH_l_csi_HopEn[2]; // [0] - first hop, [1] - second hop
    int16   PUSCH_SymNum_HopEn[2]; // [0] - first hop, [1] - second hop

    uint32  BitFix1Num;
	int     pusch_re_cnt[MAXSYMNUM]; // 每个符号上用于映射PUS的RE数
    int8    pusch_re_flag[MAXSYMNUM][MAXRBNUM * SC_PER_RB]; //yangyan20180417
    int8    pusch_re_flag_dmrsport[MAXSYMNUM][12][MAXRBNUM * SC_PER_RB]; //M zhangyanqun@20180529
    int16   PUSCH_HARQ_RENum;
    int16   PUSCH_HARQ_RENum_RESERVE;
    int16   PUSCH_CSI1_RENum;
    int32   PUSCH_UCI_RE_Num;           // RE used for UCI transmition
    float   PUSCH_HARQ_BetaOffset;           // 38.213  Table 9.3-1
    float   PUSCH_CSI1_BetaOffset;           // 38.213  Table 9.3-2
    int8   PUSCH_HARQ_BetaOffset_Idx;        // 38.213  Table 9.3-1
    int8   PUSCH_CSI1_BetaOffset_Idx;        // 38.213  Table 9.3-2
    int8   PUSCH_DMRS_maxLength;             // 38.212  Table 7.3.1.1.2-6~23
    float   PUSCH_Alpha;                // {0.5,0.65,0.8,1}
    int    stagenum;     //added zhangyanqun@20180601 for FPGA Hybrid DFT
	int    radix_array[11]; //added zhangyanqun@20180601 for FPGA Hybrid DFT
	char    shift_factor[11];//added zhangyanqun@20180601 for FPGA Hybrid DFT
	cmplx_frN w_phase_fxp[112];

	int order_table[3240]; //added zhangyanqun@20180601 for FPGA Hybrid DFT
	int  num_shift; //added zhangyanqun@20180601 for FPGA Hybrid DFT
	double float_fix_dif;  //added zhangyanqun@20180613 for FPGA fix change to flt 
	int8 L_w;        //added zhangyanqun@20180731 for time domain windowing means length of window
	fractN wdn_coef[165]; //added zhangyanqun@20180731 for time domain windowing means win coefficients,Q(14,1)
	double wdn_coef_f[165]; //added zhangyanqun@20180731 for time domain windowing means win coefficients,Q(14,1)
	uint64 ftx;          //%hz, 终端发射频点 added zhangyanqun@20180731 for phase adjust
    int slotidxfor0p5ms;
	double phase_compensate[112][2]; //added zhangyanqun@20180731 for phase adjust
	int RS_SC_Num;   //added zhangyanqun@20180822 for fpga MT ZC RS sequence length
	int Nzc;    //added zhangyanqun@20180822 for fpga MT ZC 
	int32 cordic_fac;  //added zhangyanqun@20180822 for fpga MT pi/(2*Nzc) ,Q(27,3)
	fractM BetaDMRS;   //added zhangyanqun@20180822 for fpga MT beta_dmrs
	int16  CP_Len[MAXSYMNUM];  //added zhangyanqun@20180823 for fpga MT cp_len
	uint32	dmrs_cinit_x1[RS_NUM_PER_TTI_UL]; //added zhangyanqun@20180823 for fpga MT pn_sequence init x1 = x1(1600+bwp_start)
	uint32	dmrs_cinit_x2[RS_NUM_PER_TTI_UL]; //added zhangyanqun@20180823 for fpga MT pn_sequence init x2 = x2(1600+bwp_start)
	uint32	scramb_cinit;
	uint32 scramb_cinit_v1;
    uint32  dmrs_cinit[RS_NUM_PER_TTI_UL]; //added zhangyanqun@20180829 for fpga MT pn_sequence dmrs_cinit 
	int ifft_shift_factor[12];  //added zhangyanqun@20180901 for dsp config FTT para 
	cmplx_frN	Lamda_Scale[MAXSYMNUM]; // factor in SRP_Scaler & phase adjust for every symbol, added by zhangyanqun @2018-09-05 
    int		n_Scale[MAXSYMNUM];      // shift in SRP_Scaler
	cmplx_t	Lamda_Scale_flt[MAXSYMNUM];      // shift in SRP_Scaler
    int16 ack_restart[MAXSYMNUM];
    int16 ack_d[MAXSYMNUM];
    int16 ack_rsvd_d[MAXSYMNUM]; // 38.212 6.2.7 step1 RESERVED ACK,d
    int16 ack_rsvd_cnt[MAXSYMNUM]; // 38.212 6.2.7 step1 RESERVED ACK,m_RE_cnt
    int16 csi1_restart[MAXSYMNUM];
    int16 csi1_d[MAXSYMNUM];

    uint8 cheMMSENorm;
    uint8 cheSINRflag;
    float pdpAlpha;
	int shift;
    //PUCCH
    int8  BRP_UCI_Op[UCI_MAX_BITNUM];  
	int32 UCI_Len;
	int16 UCI1_A_Len;
	int16 UCI2_A_Len;
    int8  PUCCH_Format;
    int8  SlotIdx;
    int   ScrambID;
	int32 CiniForPUCCH;
	UINT32 CiniSramForPUCCH;
	uint32	pucch_scramble_x1;
	uint32	pucch_scramble_x2;
    int16 CellID;
	int   n_ID; //hoppingid
	int   n_RNTI;
    int8  SRS_Flag;
    int8  PUCCH_TxNum;
    double BetaPUCCH;    
	double BetaDMRSPUCCH;
	fractN BetaPUCCH_Fix;
	fractN BetaDMRSPUCCH_Fix;
    int  PUCCH_RB_Index[2];
    int8  FirstSym_Pos;
    int8  N_PUCCH_SYM;
    int8  intra_slot_hopping;
    int8  Half_BPSK;
    int8  Additional_DMRS;
    int8  F1_OCC_Index;
    int8  m0;
    int8  PUCCH_RB_Num;
    int8  N_SF_PUCCH4;
	int8  PUCCH_SymBitMap[14];
    int   Tao;
    int   Omiga;
    int   PUCCH_RS_u[2];//first hop,second hop
	int   PUCCH_RS_v[2];//first hop,second hop
	int   PUCCH_RS_q[2];
	int8   DataSymNum;
	int8   DmrsSymNum;
	int8   DataSymPos[PUCCH_DATA_MAX_NUM];
	int8   DmrsSymPos[PUCCH_DMRS_MAX_NUM];
	int8   DataSymFirstHop;
    int8   DmrsSymFirstHop;
    int8  SeqGrouHopping;
	int8 scale_In[MAX_ULRX_NUM][MAXSYMNUM];
	int8 PUCCH_SR_Flag;
   	int16  SR_Length;
	int16  ACK_Length;
	int16  CSIP1_Length;
	int16  CSIP2_Length;
    int16  UCI1_E_Len;
    int16  UCI2_E_Len;
	uint8 pucch_sym_flag[14];//bit复用是用来指示是放置UCI1还是UCI2，还是UCI1和UCI2同符号
	int8 PUCCH_NfRs;
	int PUCCH_DataShift[7];  
	int PUCCH_DmrsShift[7];
    uint32 Pucch_uci1_counter[MAXSYMNUM];
    uint32 Pucch_uci2_counter[MAXSYMNUM];
	//added by guobaojuan,20181009
	int8 PUCCHMuFlag;//MU多用户复用标示，0表示关闭，1表示开启，此处的MU是指循环移位复用,对format0\1\4生效。
	int8 PUCCHMuOCCFlag;//MU多用户复用标示，0表示关闭，1表示开启，此处的MU是指OCC复用,只对format1\4生效。
	int8 PUCCHOCCNum;//MU OCC多用户复用数,默认单用户,在PUCCHMuOCCFlag=1时生效。
	int8 Radix2Shift_PUCCH[11] ;//added by cyp @20181214
	int8 Radix3Shift_PUCCH[5] ;//added by cyp @20181214
	int8 Radix5Shift_PUCCH[2] ;//added by cyp @20181214
	int8 PUCCH_UCI_BRP[4];
	int8 IfftRShift;
	int8 DftRShift;
	int  ModSymLen;
	int  BitLen;
	int  PUCCH_BitLen;
	int SR_Value;
	int  ACK_Value;
	int  CSI1_Value;
	int  Fmt01_UCI_BRP[4];
	  //===========================================================PUCCH
    //PRACH
    int     PRACH_Format;
    int     PRACH_fRA;
    int     PRACH_ZC_Cv;  // cyclic shift value (Cv)
    int     PRACH_ZC_u;   // root sequence index (u)
    int     n_PRACH_PRB;   // PRACH start RB
    int     N_RA_PRB;       //
    int8    BW_switch;      // 0 - 10M, 1 - 20M, 2 - CHBW
    int32   PRACH_Scs_Index; //2018-1-30
    int     N_Scale;
    int     PRACH_HighSpeedFlag; // 0 - unrestricted, 1 - restricted type A, 2 - restricted type B
    int     PRACH_RootIdx;  // 839: 0~837, 139: 0~137
    int     PRACH_RootStartIdx;  // 839: 0~837, 139: 0~137
    int     PRACH_PreambleSeq; // 0~63
    int     PRACH_PreambleStartSeq; // 0~63
    uint8   Ncs_Config; // 0~15
	uint8   Nrep;

    // param calc
    double  RA_Lamda_Scale; // SRP scaler
    int     L_RA;       // 839 or 139
    int     RA_N_up;    // N_up in 839, 1 in 139
    int     RA_CP_Len;  // CP length
    int     RA_IFFT_Op_Len; // RA_CP_Len + N_RP*RA_IFFT_Size
    int     RA_Filter_Op_Len;   // RA_N_up*RA_IFFT_Op_Len
	double  RA_Filter_Coef[49];
    int     RA_IFFT_Size;   // IFFT size
    int     TXAntennaNum;   // default value is 1
    int     TxPortNum;  // default value is 1
    int     k_freqoffset;   // shfit in 38.211 Table 6.3.3.2-1
    int     k2_shift;   // shift in remapper
    int     RA_F_o;     // FreqOffset
    double  K_ratio;    // SCS_PUSCH/SCS_PRACH

	float   PRACH_Scale;
	int     PRACH_DFT_Shift;
	int     PRACH_RA_Shift;
	int     sum_shift;

    //SRS
    int32   SRS_k2_shift[2][MAX_SRS_SYM_NUM];              //FTT k2搬移
	int      Ncs_TxPortTable[4];             // 每个端口NCS
    double   BetaSRS;                       // amplitude scaling factor in 3GPP TS 38.211
	fractN   BetaSRS_Fix;                       // amplitude scaling factor in 3GPP TS 38.211
    int32   SRS_k0[MAX_SRS_SYM_NUM];                   // k0_pi in 3GPP TS 38.211
    int8    SRS_TxPortNum;                  // number of antenna ports
    int32   T_SRS;                          // SRS Periodicity (slots), 3GPP TS 38.211 Table 6.4.1.4.4-1
    int32   T_offset;                       // SRS Slot Offset, 3GPP TS 38.211 Table 6.4.1.4.4-1
    int32   I_SRS;                          // SRS time configuration index
    int8    SRS_SymNum;                     // 211中的参数N_Symb_SRS，1, 2, 4
    int8    SRS_Symb_Offset;                // 211中的参数l_offset，0~5
	int8    SRS_l_Offset;                   //两个SRS信号之间间隔
    int    SRS_Symb_Start[MAX_SRS_SYM_NUM];                 // 211中的参数，由SRS_Symb_Offset算出
	int8    SRS_SymBitMap[MAXSYMNUM];
    int8    RepetFactor;                    // R in 3GPP TS 38.214
    int     SRS_Ncs;                        // Cyclic shift param in 3GPP TS 38.211
	int8    SRS_GroupSequenceHopping;       // SRS组跳频使能，0：neither；1：groupHopping；2：sequenceHopping
	int     SRS_ID;                         // SRS序列ID
    int     SRS_uIdx[MAX_SRS_SYM_NUM];                       // u in 3GPP TS 38.211
    int     SRS_vIdx[MAX_SRS_SYM_NUM];                       // v in 3GPP TS 38.211
    int     SRS_K_Tc;                       // SRS_K_Tc in 3GPP TS 38.211
    int     SRS_RB_Num;                     // m_SRS,b
	int     SRS_SC_Num;                     // m_SRS,b
    int8    SRS_AGC_EnFlag;                 // SRS的AGC开关，1: 打开；0: 关闭	
    // For SRS Mapping, added by Ding Yang, 2018/04/10
    int     B_SRS;                          // BSRS
    int     C_SRS;                          // CSRS
    int     SRS_bhop;                       // Freq Hopping: bhop
    int     SRS_nRRC;                       // High level Params: nRRC
    int     SRS_nshift;                     // Freq Position: nShift
    int     SRS_ktc_bar;                    // ktc_bar = 0,1,...,K_Tc-1
    int     SRS_cfg_type;                   // 0: Aperiodic, 1: Periodic, 2: Semi-Persist
	int      SRS_Nb[4];
	int      nbResult[4][MAX_SRS_SYM_NUM];
	int      m_SRS_b[4];
	int      time_delta;
	int      SRS_l_bar;
	int     SRSNum_Print;
	int     SlotNum_perFrame;
    // SRS跨时隙AGC因子补偿参数
    int     AGCcross_StreamNum;             // 跨时隙AGC因子补偿需要的SRS时隙数目
    int     AGCcross_SubBandNum;            // 各种配置下，每个OFDM符号上占用的不同子带的总数
    int     AGCcross_SlotNum;               // 跨时隙AGC因子补偿需要的SRS时隙数目
    int     AGCcross_Slot_index;            // 一次联合处理的时隙编号
    int     iUE;                            // UE编号
    // SRS实际天线仿真参数
    int8    SRS_gnbPhyTxNumFlag;            // 基站实际天线仿真开关，1: 打开；0: 关闭
    int32   SRS_ActualgnbPhyTxNum;          // 基站实际天线数目
    int8    CHE_Print_Flag;                 // added by wangrongbo 20190318

    //PT-RS //added by lichen, 2017-12-18
	double  PUSCH_PTRS_Beta;    // PTRS Beta
    UINT8   UL_PTRS_present;    // 0: UL PT-RS off, 1: UL PT-RS on, TS 38.214 6.2.3
    UINT8   UL_PTRS_time_density;       // UL PT-RS time density, TS 38.214 6.2.3
    UINT8   UL_PTRS_frequency_density;      // UL PT-RS frequency density, TS 38.214 6.2.3
	UINT8   UL_PTRS_group_num;   // DFT波形时PT-RS的组数，和PUSCH_RB_Num相关, TS 38.214 6.2.3.2
	UINT8   UL_PTRS_sample_num;  // DFT波形时PT-RS每组的Sample数，和PUSCH_RB_Num相关, TS 38.214 6.2.3.2

    int16   PTRS_RE_Num; // number of RE for PT-RS, added by lichen, 2017-12-19
    int16   PTRS_Symb_Num; // number of OFDM symbol for PT-RS, added by lichen, 2017-12-19
	int16   k_PTRS_RE_pos[2][PUSCH_Max_RE / 12 / 2]; // k, RE index of PT-RS, added by lichen, 2017-12-18
	int16   l_PTRS_Symb_Pos[14]; // l, OFDM symbol index of PT-RS, added by lichen, 2017-12-19
	UINT8   l_PTRS_Symb_flag[14]; // flag of l, 0: no PT-RS, 1: PT-RS, added by lichen, 2017-12-20

    //Channel Parameters
    int8  TxNum;  //PDSCH发射天线端口数
    int32 UeFreqOffset;  //接收频偏Hz
    int32 RxNum; //UE接收天线数
    int32 RNTI; //识别号

	int8  WX_Flag;
	int8  Flag400MHz;
	double P_target;
	cmplx_frN TailWnd[MAX_L_W];
	cmplx_t TailWnd_f[MAX_L_W];
	int8 AddWindow_Flag;
	uint8  FFT_Shift;
} stULParamTable;

typedef struct
{
	int16 SlotIdx[PUSCH_CASE_NUM];
	int RNTI[PUSCH_CASE_NUM];
	int N_Cell_ID[PUSCH_CASE_NUM];
	
	int  PUSCH_RB_Num[PUSCH_CASE_NUM]; // PUSCH RB数
	int  CHBW[PUSCH_CASE_NUM]; // 系统带宽
	int  SCS[PUSCH_CASE_NUM]; // 子载波间隔

	float fRate[PUSCH_CASE_NUM]; // 0~28
	int8  ModuMod[PUSCH_CASE_NUM]; // 0~4

	int CHBW_MHz[PUSCH_CASE_NUM];
	int8 PUSCH_DMRS_Add_Pos[PUSCH_CASE_NUM];
	uint32 ftx[PUSCH_CASE_NUM];

	int8 PUSCH_HopMod[PUSCH_CASE_NUM]; // 0 - no seq hop no group hop, 1 - no seq hop, 2 - no group hop
	int8 frequencyHoppFlag[PUSCH_CASE_NUM]; // 0 - no  frequencyHopp  1 -  intraSlot, 2 - interSlot
	int PUSCH_VRB_Offset[PUSCH_CASE_NUM];
	int PUSCH_VRB_START[PUSCH_CASE_NUM];
	int PUSCH_SymNum[PUSCH_CASE_NUM]; // 6/8/10/12/14
	int8 CP_Type[PUSCH_CASE_NUM]; // 0 - Normal, 1 - Extended

	int8 PUSCH_HARQ_Flag[PUSCH_CASE_NUM];
	int PUSCH_HARQ_A_Len[PUSCH_CASE_NUM]; // 1/2
	int8 PUSCH_HARQ_BetaOffset_Idx[PUSCH_CASE_NUM]; // 0~15
	int8 PUSCH_CSI1_Flag[PUSCH_CASE_NUM];
	int PUSCH_CSI1_A_Len[PUSCH_CASE_NUM]; // 4
	int8 PUSCH_CSI1_BetaOffset_Idx[PUSCH_CASE_NUM]; // 0~18

	uint8 UL_PTRS_present[PUSCH_CASE_NUM];
	int UeFreqOffset[PUSCH_CASE_NUM];

}stPUSCHCaseParamTable;

typedef struct
{
	int8 SymFirstPosLen;//首符号的位置的个数，主要用于用例的循环
	int8 SymNumLen;//符号长度的个数，主要用于用例的循环
	int8 FirstSymlen;
	int8 RBlen;//RB个数
	int8 RBFirstPosLen;
	int8 HopModlen;
	int8 slotlen;
	int8 UCIlen;
	int8 CellIDLen;
	int8 SRlen;
	int8 n_IDTLen;	
	int8 m0len;
	int8 Focclen;
	int8 HalfBPSKlen;
	int8 ScrambIDlen;
	int8 SymNum_Table[MAX_CASE_NUM];
	int8 FirstSymPos_Table[MAX_CASE_NUM];
	int nID_Table[MAX_CASE_NUM];
	int8 SlotIdx_Table[MAX_CASE_NUM];
	int PUCCHRBStart_Table[MAX_CASE_NUM][2];
	int8 HopMod_Table[MAX_CASE_NUM];
	int8 bitlen;
	int8 bitlen_Table[MAX_CASE_NUM];
	int8 SR_Table[MAX_CASE_NUM];
	int8 m0_Table[MAX_CASE_NUM];
	int8 Focc_Table[MAX_CASE_NUM];
	int8 HalfBPSK_Table[MAX_CASE_NUM];
	int8 Additional_DMRS_Table[MAX_CASE_NUM];
	int ScrambID_Table[MAX_CASE_NUM];
	int8 RBNum_Table[MAX_CASE_NUM];
	int8 N_SFPUCCH4_Table[MAX_CASE_NUM];
	int8 SRLength_Table[MAX_CASE_NUM];
	int8 ACK_Length_Table[MAX_CASE_NUM];
	int8 CSIP1_Length_Table[MAX_CASE_NUM];
	int8 CSIP2_Length_Table[MAX_CASE_NUM];
	int8 AdditionalDMRS_Table[MAX_CASE_NUM];
}stPUCCHCaseParamTable;
typedef struct
{
    cmplx_t  acfH[MAX_RX_ANT_NUM][MAX_TX_ANT_NUM];////RxAnt,Port
    cmplx_t  acfRxData[MAX_RX_ANT_NUM];////RxAnt
    INT16    s16_RbIndex;////RxAnt
    UINT16   ReIndex;
} stMimoData;

typedef struct
{
    cmplx_frN  acsH[MAX_RX_ANT_NUM][MAX_TX_ANT_NUM];////RxAnt,Port
    cmplx_frN  acsRxData[MAX_RX_ANT_NUM];////RxAnt
    INT16    s16_RbIndex;////RxAnt
	fractM   NoisePow;
    UINT16   ReIndex;
} stMimoData_fxp;

// typedef struct
// {
//     cmplx_t dm_Rs[MAX_CORESET_NUM][MAX_PDCCH_SYM_NUM][PDCCH_DMRS_NUM_RB * MAXRBNUM];  // MAX_CORESET_NUM * 3ofdm* (PDCCH_DMRS_NUM_RB*MAXRBNUM) subcarrier
//     int32   dm_Rs_len[MAX_CORESET_NUM];                         // MAX_CORESET_NUM
//     uint8   pdcch_bit[MAX_CORESET_NUM][SC_PER_RB * MAX_REG_NUM * 2];   // MAX_CORESET_NUM * 3ofdm* (SC_PER_RB*MAXRBNUM) subcarrier
//     uint8   pdcch_payload[MAX_CORESET_NUM][SC_PER_RB * MAX_REG_NUM * 2];   // MAX_CORESET_NUM * 3ofdm* (SC_PER_RB*MAXRBNUM) subcarrier
//     cmplx_t pdcch_symbol[MAX_CORESET_NUM][MAXSYMNUM][MAX_FFT_SIZE];    // MAX_CORESET_NUM * 14ofdm* MAX_FFT_SIZE subcarrier
//     int32   PDCCH_RE_num[MAX_CORESET_NUM];                          // MAX_CORESET_NUM
//     cmplx_t PDCCH_Symbol_Seq[MAX_CORESET_NUM][SC_PER_RB * MAX_REG_NUM];    // MAX_CORESET_NUM * MAX_PDCCH_RE_NUM
//     uint8   dmp_table[MAX_CORESET_NUM][MAXSYMNUM][SC_PER_RB * MAXRBNUM];
// }  st_pdcch_data;  //PDCCH TX data

// typedef struct
// {
//     cmplx_t H_LS[MAX_CORESET_NUM][MAX_RX_ANT_NUM][MAX_PDCCH_SYM_NUM][PDCCH_DMRS_NUM_RB * MAXRBNUM];  // MAX_CORESET_NUM * MAX_RX_ANT_NUM * 3ofdm* (PDCCH_DMRS_NUM_RB*MAXRBNUM) subcarrier
//     cmplx_t H[MAX_CORESET_NUM][MAX_RX_ANT_NUM][MAX_PDCCH_SYM_NUM][SC_PER_RB * MAXRBNUM];      // MAX_CORESET_NUM * MAX_RX_ANT_NUM *3ofdm* (PDCCH_DMRS_NUM_RB*MAXRBNUM) subcarrier
//     cmplx_t IdealH[MAX_RX_ANT_NUM][MAXSYMNUM][SC_PER_RB * MAXRBNUM];
//     cmplx_t Rec_Rs_dat[MAX_CORESET_NUM][MAX_RX_ANT_NUM][MAX_PDCCH_SYM_NUM][PDCCH_DMRS_NUM_RB * MAXRBNUM];  // MAX_CORESET_NUM * MAX_RX_ANT_NUM * 3ofdm* (PDCCH_DMRS_NUM_RB*MAXRBNUM) subcarrier
//     cmplx_t dm_Rs[MAX_CORESET_NUM][MAX_PDCCH_SYM_NUM][PDCCH_DMRS_NUM_RB * MAXRBNUM];
//     uint32  dm_Rs_len[MAX_CORESET_NUM];
//     uint32  PDCCH_RE_num[MAX_CORESET_NUM];                    // CORESET_NUM
//     uint8   dmp_table[MAX_CORESET_NUM][MAXSYMNUM][SC_PER_RB * MAXRBNUM];
//     stMimoData  MimoElm[MAX_CORESET_NUM][SC_PER_RB * MAX_REG_NUM]; //Max mimo data
//     cmplx_t dec_Symbol_Seq[MAX_CORESET_NUM][SC_PER_RB * MAX_REG_NUM];    // MAX_CORESET_NUM * MAX_PDCCH_RE_NUM
//     real_t  bit_LLR[MAX_CORESET_NUM][SC_PER_RB * MAX_REG_NUM * 2];
//     uint8   bit[MAX_CORESET_NUM][SC_PER_RB * MAX_REG_NUM * 2];
//     uint8   crc_result;
// }  st_pdcch_rx_data;

typedef struct
{
    uint8   CSI_ReNum;   //CSI RE number in each RB
    uint8   CSI_SymNum;  //CSI symbol number in each RB
    uint8   CSI_RE[MAX_CSI_RENUM];  //CSI RE location
    uint8   CSI_Symbol[MAX_CSI_SYMNUM];  //CSI symbol location
    int8    w_f[MAX_CSI_RENUM];   //frequency OCC code
    int8    w_t[MAX_CSI_SYMNUM];  //time OCC code
    uint32  CSI_RS_Len[MAXSYMNUM];    //compassed CSI-RS
    cmplx_t CSI_RS_Seq[MAX_CSI_SYMNUM][MAX_CSI_RENUM * MAXRBNUM]; //
    cmplx_t CSI_RS_data[MAXSYMNUM][SC_PER_RB * MAXRBNUM]; //
} st_CSI_1Port_data;  //CSI-RS TX data
typedef struct
{
    uint8   CSI_ReNum;   //CSI RE number in each RB
    uint8   CSI_SymNum;  //CSI symbol number in each RB
    uint8   CSI_RE[MAX_CSI_RENUM];  //CSI RE location
    uint8   CSI_Symbol[MAX_CSI_SYMNUM];  //CSI symbol location
    int8    w_f[MAX_CSI_RENUM];   //frequency OCC code
    int8    w_t[MAX_CSI_SYMNUM];  //time OCC code
    uint32  CSI_RS_Len[MAXSYMNUM];    //compassed CSI-RS
    cmplx_frN CSI_RS_Seq[MAX_CSI_SYMNUM][MAX_CSI_RENUM * MAXRBNUM]; //
    cmplx_frN CSI_RS_data[MAXSYMNUM][SC_PER_RB * MAXRBNUM]; //
    // added for phase compensation 2018-08-15
    cmplx_frN CSI_RS_data_PhaseComp[MAXSYMNUM][SC_PER_RB * MAXRBNUM]; //
    // end of "added for phase compensation 2018-08-15"
} st_CSI_1Port_data_fxp;  //CSI-RS TX data

typedef struct
{
    cmplx_frN csi_data[MAX_LAYER_NUM][MAXSYMNUM][SC_PER_RB * MAXRBNUM];
    uint8  csi_idx[MAX_LAYER_NUM][MAXSYMNUM][SC_PER_RB * MAXRBNUM];
    uint8  dmp_stream_table[MAX_LAYER_NUM][MAXSYMNUM][SC_PER_RB * MAXRBNUM];
    uint8  dmp_table_all[MAXSYMNUM][SC_PER_RB * MAXRBNUM];
    // added for phase compensation 2018-08-15
    cmplx_frN csi_data_PhaseComp[MAX_LAYER_NUM][MAXSYMNUM][SC_PER_RB * MAXRBNUM];
    // end of "added for phase compensation 2018-08-15"
} st_CSI_RS_allstream;

typedef struct
{
    cmplx_t H[MAX_RX_ANT_NUM][MAX_TX_ANT_NUM][MAXRBNUM];    // original channel
    cmplx_t H_prevary[MAX_RX_ANT_NUM][MAX_TX_ANT_NUM][MAXRBNUM]; // prevary channel
    cmplx_t Ruu[MAX_RX_ANT_NUM][MAX_RX_ANT_NUM][MAXRBNUM]; //subband Ruu
    cmplx_t InvRuu[MAX_RX_ANT_NUM][MAX_RX_ANT_NUM][MAXRBNUM]; //subband InvRuu
    INT16   Ruu_shift[MAXRBNUM];  //subband InvRuu shift
    INT16   Ruu_shift_MIN;   //for wideband Rnn
    int     csi_len;  //number of CSI-RS
    int     csi_subbandsize;  //sub_band SIZE
    int     csi_subband_num;
    cmplx_t R_HH[MAX_TX_ANT_NUM][MAX_TX_ANT_NUM];   //wideband R_HH
    cmplx_t Rnn_Subband[MAX_CSI_PORTNUM][MAX_CSI_PORTNUM][MAXRBNUM]; //sub band Rnn
    cmplx_t Rnn_Wideband[MAX_CSI_PORTNUM][MAX_CSI_PORTNUM];//wide band Rnn
    cmplx_frM Rnn_Subband_fxp[MAX_CSI_PORTNUM][MAX_CSI_PORTNUM][MAXRBNUM]; //sub band Rnn
    cmplx_frM Rnn_Wideband_fxp[MAX_CSI_PORTNUM][MAX_CSI_PORTNUM];//wide band Rnn
    float   trace;
    int     RI;
    int     PMI_CodeBookMode; // 1:MODE 1 2:MODE2
    int     N1, N2, O1, O2, Ng;
    int     i11, i12, i13, i14; //for PhyAntNum > 2
    // cmplx_t Heff[MAXRBNUM][MAX_RX_ANT_NUM][MAX_LAYER_NUM]; //subband
    int     codebook_wideband;     //PhyAntNum=2
    int     codebook[MAXRBNUM];    //PhyAntNum=2
    int     i2_wideband;
    int     i2[MAXRBNUM];
    int     select_subband;
    float   MI_wideband[QAM256];
    int     CQI_cw0_wideband;
    int     CQI_cw0[MAXRBNUM];
    int     CQI_cw1_wideband;
    int     CQI_cw1[MAXRBNUM];
    float   det;
} st_CSI_feedback;

typedef struct
{
    uint8   Idx_Path[4];//path index, l to RI-1 is useful
    real_t  PM;//path l to RI-1
    uint8   bit_Path[4][6];//path l+1 to RI-1
    int     SonNumber;         //Imbalance expanding
}  NodeFSD;

//structure used for polar
typedef struct
{
    UINT8   ucCrcLen;
    UINT32  uwCrcPoly;
    UINT32  uwALen;                      // A length for tb
    UINT32  uwKLen;                      // K length for tb
    UINT32  uwNLen;                      // N length for tb
    UINT32  uwELen;                      // E length for tb
    UINT32  uwArLen;                     // Ar length for icb
    UINT32  uwKrLen;                     // Kr length for icb
    UINT32  uwNrLen;                     // Nr length for icb
    UINT32  uwErLen;                     // Er length for icb
    UINT32  uwRNTI;
    UINT32  auwRxRNTI[POLAR_MAX_RNTI_NUM]; //Polar译码需要尝试的RNTI
    UINT8   ucRxRNTINum;                   //Polar译码需要尝试的RNTI个数
    UINT8   ucBitLen;                    // n
    Float   fRate; //code rate
    Float   fBeta;
    Float   fRepThr;
    Float   fPunThr;
    UINT8   ucEtFlag;                    // early termination flag
    UINT8   ucILFlag;                    // Info Bit Interleaver Flag
    UINT8   ucBILFlag;                   // Channel Bit Interleaver Flag
    UINT8   ucSEGFlag;                   // Code Block Segmentation Flag
    UINT8   ucBlcokNum;                  // Code Block Num
    UINT8   ucULFlag;                    // 1: uplink ,0:downlink
    UINT8   ucPcNum;
    UINT8   ucWmPcNum;
    UINT8   nmax;
    UINT8   ucDecType;//Decoding algorithm  FSCL/SCL/
    UINT8   ucSegZeroFlag;    // ((uwALen%2!=0)&&(ucBlcokNum==2))?1:0;
    UINT8   ucSegZeroFlag_RM; // ((uwELen%2!=0)&&(ucBlcokNum==2))?1:0;
    UINT8   ucPhyChType;  //物理信道类型
    UINT8   ucModType;   //Mod Type: 0,BPSK;1:QPSK;2:16QAM;3:64QAM;4:256QAM
    UINT32  uwTTI;
    UINT8   ucT;
    UINT8   ucRTLCheckFlag;   //是否跑打印测试向量的Polar译码分支, 0:否； 1：是
    UINT8   FltFxpFlag;   //定浮点标志
    UINT8   RandnFlag;
    UINT16  XilinxPolarFalseDetPmThresh; // 虚检判断门限,Q(16,1)
    // para print for steps result
    UINT8   ucT_i;
    UINT8   ucT_j;
    UINT16  usCutLen;
    UINT16  ausQ0N[MAX_POLAR_LENGTH];
    UINT16  ausQITmp[MAX_POLAR_LENGTH];
    UINT16  ausQFTmp[MAX_POLAR_LENGTH];
    UINT16  ausQIN[MAX_POLAR_LENGTH];
    UINT8   aucFinfo[MAX_POLAR_LENGTH];
    UINT8   aucFpc[MAX_POLAR_LENGTH];
	INT32   candidate_index;
    char   *CaseName;
} stPolarParam;

typedef struct
{
    UINT8    ucL;                                            //LIST LENGTH
    UINT8    ucLayerNum;                                     //Toal Layer Num
    UINT8    ucLeafNodeNum;                                  //Number of Leaf Note
    Float    fLlrChannel[MAX_E_UCI];                         //Channel Output LLR
    Float    fSegLlrChannel[2][MAX_E_LENGTH];                //Channel Output LLR
    Float    fLlr[MAX_POLAR_LENGTH * 2];                     //LLR  after DeRateMatch
    INT16    sLlr[MAX_POLAR_LENGTH * 2];                     //LLR  after DeRateMatch
    Float    fAlpha[MAX_LIST_LENGTH][MAX_POLAR_LENGTH];      //LLR
    UINT8    ucBeta[MAX_LIST_LENGTH][MAX_POLAR_LENGTH * 2];  //hard decide,2N-2
    Float    fPm[MAX_PM_LENGTH];                             //Path metric
    Float    fDm[MAX_PM_LENGTH];                             //used for early termination
    UINT8    aucP[MAX_POLAR_LENGTH];                         //info bit postion index
    UINT16   ausRowWeight[MAX_POLAR_LENGTH];                 //row weight
    UINT8    aucPcFlag[MAX_POLAR_LENGTH];                    // PC bit position flag
    UINT8    aucV[128][128];
    Float    afV[128][128];
    UINT16   ausInterleaverIdx[MAX_POLAR_LENGTH];
    UINT16   ausSubBlkInterLeaverIdx[MAX_POLAR_LENGTH];
    UINT8    ucDistriCrcFlagKLen[MAX_POLAR_LENGTH];
    UINT8    ucDistriCrcFlagNLen[MAX_POLAR_LENGTH];
    UINT16   usDistriCrcIdxNlen[DIS_CRC_LEN];
    UINT16   usPcIdxNlen[N_PC_MAX];
    UINT8    ucDistriCrcIdx;
    UINT8    ucPcIdx;
    UINT8    aucInfoCode[MAX_POLAR_LENGTH * 2];
    UINT8    aucSegCodeBlock[2][MAX_POLAR_LENGTH];
    UINT8    aucInterleaverCode[MAX_POLAR_LENGTH];
    UINT8    aucCodeBits[MAX_POLAR_LENGTH * 2];
    UINT8    aucRateMatchBits[MAX_E_UCI];
    UINT8    aucSegRateMatchBits[2][MAX_E_LENGTH];
    UINT8    aucLPathDecBits[MAX_LIST_LENGTH][MAX_POLAR_LENGTH];
    UINT8    aucDecBits[MAX_POLAR_LENGTH * 2];
    UINT8    aucSegDecBits[2][MAX_POLAR_LENGTH];
    UINT32   uwDecRnti; // CRC校验通过时对应的RNTI
    UINT8    aucLnPathIdx[MAX_LIST_LENGTH]; // 右节点译码时所选的"左节点路径"
    UINT8    aucRnPmSortIdx[POLAR_MAX_PATH_NUM]; 
    UINT8    ucCrcResult;
    UINT8    aucDistriCrcResult[MAX_LIST_LENGTH][DIS_CRC_LEN];
    UINT8    BA_TABLE[MAX_POLAR_LENGTH];
    double   *Screambling_c;
    int      PBCH_Combine_Flag;
	int      PBCH_Combine_Method;
    int      L_Max;
    int      iUE;
    int      iSSB;
	// added for PBCH bit level print 2019-05-16
	int PBCH_Print_Flag;
	int FltFxpFlag;
	// end of "added for PBCH bit level print 2019-05-16"
} stPolarData;


typedef struct
{
    UINT16  usNodeIdx;                         //NodeIdx in total binary tree
    UINT8   ucNodeType;                        //0: Rate0, 1:Rate1, 2:SPC,  3:REP,  4:Other
    UINT8   ucStartLayer;                      //From which layer to calc LLR
    UINT8   ucCurrentLayer;                    //on which layer
    UINT8   aucTrace[MAX_POLAR_LAYER_NUM];     //tracing left or right node from start layer 1:left 0:right
    UINT8   CRC_flag;                          //if crc within this leafnode 0: NO, 1:YES
    UINT8   PC_flag;                           //if PC within this leafnode 0: NO, 1:YES
    UINT8   ucDisCrcIdx;
    UINT8   ucPcIdx;

} stLeafNode;

typedef struct
{
    UINT16  ausNodeIdx[MAX_POLAR_LAYER_NUM];   // the first node's index of each layer; For RTL, layer 0's idx is: 1,2
    UINT8   aucNodeType[MAX_POLAR_LAYER_NUM];  // the first node's type of each layer
    UINT8   aucIsRepNode[MAX_POLAR_LAYER_NUM]; // 各层节点是否有rep的标识
    UINT8   bottom_layer_pos;                  // 子树的最底层位置
    UINT8   enc_layer_pos;                     // 反编码层位置, 对应rtl的enc_lpos
    UINT16  usLeafIdx;                         // end-node's index in LeafList
    UINT8   ucInPathNum;                       // 该子树的入口路径数
    UINT8   ucRate0Num;                        // 该子树的rate0节点数
    UINT8   ucRepNum;                          // 该子树的rep节点数
    UINT8   ucBottomRepLayer;                  // 该子树最后一个rep节点的层号
    UINT16  usResultGrpDist;                   // 不同入口路径的Fg运算结果的间距(不同入口路径的结果在不用资源组中)
}stSubtreeInfo;

//PDSCH re-tx variable for transmission terminal
typedef struct
{
    // parameter and Flag
    //
    UINT8   *aucReTranBits[UE_NUM][HARQ_PROC_NUM];
	UINT32   auwReTranTBS[UE_NUM][HARQ_PROC_NUM];
	UINT8    aucCodeBlkNum[UE_NUM][HARQ_PROC_NUM];

} stReTxPara;
typedef struct
{
    UINT32   auwReTranTBS[UE_NUM][HARQ_PROC_NUM];
    UINT8    aucCodeBlkNum[UE_NUM][HARQ_PROC_NUM];
} stReTxRxPara; //pusch paramgen
//PDSCH re-tx variable for receiver
typedef struct
{
    // parameter and Flag
    UINT8   aucReTransTimes[UE_NUM][HARQ_PROC_NUM][MAX_CB_NUM];
    UINT8   aucsimple_mb[UE_NUM][HARQ_PROC_NUM];
    //
    float   *afReTxSoftBits[UE_NUM][HARQ_PROC_NUM][MAX_CB_NUM];
	UINT32   auwReTranTBS[UE_NUM][HARQ_PROC_NUM];
} stReTxParaRx;

//PDSCH re-tx variable for receiver
typedef struct
{
    // parameter and Flag
    UINT8   aucLlrShift[UE_NUM][HARQ_PROC_NUM][MAX_CB_NUM];
    UINT8   aucReTransTimes[UE_NUM][HARQ_PROC_NUM][MAX_CB_NUM];
    UINT8   aucsimple_mb[UE_NUM][HARQ_PROC_NUM];
    int     harq_comb_len[UE_NUM][HARQ_PROC_NUM];
	int     harq_comb_len_prev_plus[UE_NUM][HARQ_PROC_NUM];
	int     harq_comb_len_minus[UE_NUM][HARQ_PROC_NUM];
	int     harq_comb_len_plus[UE_NUM][HARQ_PROC_NUM];
    //
    INT8   *afReTxSoftBits[UE_NUM][HARQ_PROC_NUM][MAX_CB_NUM];
	UINT32   auwReTranTBS[UE_NUM][HARQ_PROC_NUM];
} stReTxParaRxfxp;



// add for c model
typedef struct
{
    // TBpara
    int tb_start_addr;
    int head_addr_offset;
    int LenAllUE;
    int LenfillBit;
    int rawbitdelta;
    int cb_start_addr;
    int cb_head_addr_offset;

} stLDPCTBandCBPara;



// add for c model
typedef struct
{
    int32 FltFxpFlag;  //定浮点标志
    int32 AFC_Flag; //AFC使能,0不使能/1使能
    int32 ATC_Flag; //ATC使能,0不使能/1使能
    int32 PSS_SSS_DTFlag; //PSS/SSS检测使能
    int32 PBCH_DTFlag; //PBCH检测使能
    int32 PDCCH_DTFlag;  //PDCCH检测使能
    int32 PDSCH_DTFlag;  //PDSCH检测使能
    int32 CQI_Feedback_Flag; //CQI反馈使能
    int32 RI_Feedback_Flag; //RI反馈使能
    int32 Fixed_RI;  //初始RI或固定RI值
    int32 PMI_Feedback_Flag; //PMI反馈使能,0不使能/1使能
    int32 RML_Flag;  //RML解调使能
    int32 Start_n_TTI;  // 仿真起始TTI序号
    int32 Runlength_TTI; // 仿真TTI长度
    int32 MaxSCS; //所有小区中最大的子载波间隔（调度TTI按最大子载波间隔的SCS调度）
    int32 MaxSCSNum;      //所有小区中Scs最大个数
    int32 CellNum;  //小区个数
    int32 UENum; //UE个数
    int32 HarqNum;      //HARQ进程数
    int32 MaxRetNum;      //最大重传次数
    int32 FftSize; //发端FFT Size
    int32 IdealEn; //理想信道估计使能
    int32 OversampFact; //过采样因子
    int32  DlUlCoe;      //上下行同时存在指示
    real_t *SNR;
    int32  SNRNum;
    UINT8  DecCfg;      //译码方式
    UINT8  DecType;      //译码算法
    UINT8  ChkMethod;      //译码校验方式
    int32  UL_M1_EnFlag;
    int32  IdealExtFact;
    int64  CarrierFreq;
    int32  CB_SelectionMethod;
    int32  iTTI;
    int32  FreqMapFlag[MAX_SCS_NUM];
    int32  FirstIn0p5Flag;
    int32  ScsMapFlag[MAX_SCS_NUM];
    int32  MIMO_Noise_Ideal_En;  ////是否支持IRC功能
} stComParam;

typedef struct
{
    //Cell-Specific Parameters
    int32 SCS_Num; //小区中BWP个数
    int32 SCS[MAX_BWP_NUM]; //每个BWP的子载波间隔
    int32 CP_Type[MAX_BWP_NUM]; //各BWP的CP类型，只有60kHz支持ECP<td range>0（正常CP）/1（扩展CP）
    int32 SCS_RbNum[MAX_BWP_NUM]; //各BWP的RB个数
    int32 SCS_Start[MAX_BWP_NUM]; //各BWP的起始位置
    int32 N_cell_ID; //物理Cell ID，参考38.211（N_1_ID，N_2_ID由此计算）
    int32 N_ID;
    int32 SS_SCS;  //SS块的SCS
    int32 SS_L;  //半帧内实际发射SS块个数，参考38.213
    int32 SS_1stSymb_Idx[MAX_L]; //半帧内实际发射SS块第一个符号位置
    int32 SS_Burst_Period; //实际SS Burst周期，参考RAN1 #88b，p64(UE初始接入检测按20ms)
    int32 SFN; //仿真起始系统帧号（MIB包含High Part，PBCH包含Low Part）
    int32 Half_Frame_Indication;  //半帧指示
    int32 SS_beta;  //SS缩放因子，参考38.211
    int32 CHBW; //小区的系统带宽Channel Bandwidths
    int32 RecFftSize; //收端15kHz子载波间隔下的FFT Size
    int32 SFI;  //SFI，参考38.211
    int32 CsiRsNum;                 //CsiRsNum<=MAX_CSI_NUM
    int32 CsiScsIdx[MAX_CSI_NUM];  //行：cell，列：CSI-RS个数，对应的Csi-Rs的SCS index
    int32 CsiPortNum[MAX_CSI_NUM];  //行：cell，列：CSI-RS个数，对应的Csi-Rs发射天线端口数
    int32 Csi_LocationIdx[MAX_CSI_NUM];
    int32 Csi_k0[MAX_CSI_NUM];
    int32 Csi_k1[MAX_CSI_NUM];
    int32 Csi_k2[MAX_CSI_NUM];
    int32 Csi_k3[MAX_CSI_NUM];
    int32 Csi_l0[MAX_CSI_NUM];
    int32 Csi_l1[MAX_CSI_NUM];
    int32 Csi_Density[MAX_CSI_NUM];
    int32 Csi_CDMType[MAX_CSI_NUM];
    int32 Csi_RBNum[MAX_CSI_NUM];
    int32 *CsiRBcfg[MAX_CSI_NUM];  //行：cell，列：CSI-RS个数，CSI-RS所在RB，注意保持连续
    int32 Csi_Periodicity[MAX_CSI_NUM];
    int32 Csi_Powfactor[MAX_CSI_NUM];
    int32 PhyTxNum; //每个Cell的物理天线数
    int32 PortIndex;  //端口起始索引
    int32 CellFreqOffset; //接收频偏Hz
    int32 CellChanCorrInd; //小区天线相关性
    int32 PDSCH_DMRS_TypeA_Pos; //第一个PDSCH DMRS符号位置
    int32 SS_k0;
    int32 FrameConfig[10];
    int32 UlDlFlag;
    int32 TRP_Mg;
    int32 TRP_Ng;
    int32 TRP_M;
    int32 TRP_N;
    int32 TRP_P;
    float TRP_d_g_V;
    float TRP_d_g_H;
    float TRP_d_V;
    float TRP_d_H;
    int32 TRP_alfa;
    int32 TRP_beta;
    int32 TRP_gama;

} stCellParam;

typedef struct
{
    UINT8 CSi_Algo_Sel;  //CSI 信道估计算法，0：LS，1：MMSE,2:Ideal
    int32 CellUEInd; //Cell发送对应UE的指示
    int32 UeScsIdx;  //业务子载波在SCS中的序号
    int32 PDSCH_DMRS_Group; //PDSCH DMRS类型，参考38.211
    int32 PDSCH_DMRS_mapping_Type;  //PDSCH DMRS mapping类型，参考38.211
    int32 PDSCH_DMRS_max_len;  //PDSCH Front DMRS最大符号数
    int32 PDSCH_DMRS_Scrambling_ID[2];  //PDSCH高层参数DL-DMRS-Scrambling-ID。取值：0~65535；-1则表示高层未配置；
    int32 PDSCH_PRB_Bundling;  //PRB_Bundling大小，参考38.213
    int32 PDCCH_Monitor_Period; //PDCCH检测周期，参考38.213
    int32 DCI_Period; //DCI周期
    int32 CoreSet_Num; //CoreSet个数，参考38.211
    int32 CoreSet_StartSymbol;  //PDCCH起始符号，参考38.213
    int32 CoreSet_Symb_Num;    //{1,2,3}  3 onlyif N_RB_DL<=X
    int32 PDCCH_AL;  //PDCCH聚合等级
    int32 PDCCH_m; //PDCCH发射位置
    int32 CoreSet_Mapping_Type;   //CCE to REG mapping, 0: non-interleaving,  1: interleaving
    // modified by 38.212 v2.0.0, 2018-01-18
    int32 CoreSet_Interleaver_Size;     // R value,(2,3,6)
    int32 CoreSet_Shift_Index;          // n_shift, f(cell_id) or [0,1,...,274]
    int32 CoreSet_Precoder_Granularity; // CORESET or CCE_AL
    // end of "modified by 38.212 v2.0.0, 2018-01-18"
    int32 CoreSet_REG_bundle_size;   //L value
    int32 CoreSet_RB_Num;
    int32 CoreSet_RB_Assignment[MAXRBNUM]; //Coreset 的RB分配
    int32 PDCCH_Payload_K; //PDCCH Payload长度
    //int32 CORESET_REG_bundle_Assignment[MAX_CORESET_NUM][MAX_REGBUNDLE_NUM][MAXRBNUM];

    UINT8 DCI_Format_Type; //下行DCI格式，0：Format1_0；1：Foramt1_1
    UINT8 PDSCH_StartSymbol; //PDSCH起始符号，参考38.211(TBD)
    UINT8 PDSCH_Int_Symb_Unit;
    int32 RB_Assignment[MAXRBNUM];  //RB分配
    int32 RB_Num;
    int8  Antenna_ports;  //DCI Format1_1中的Antenna_ports域，用来指示CDM groups、DMRS ports、Front DMRS符号数
    int8  n_SCID;  //n_SCID，参考38.211
    int32 MCS0;
    int32 MCS1;
    int32 MIMO_MOD;  //MIMO模式
    int32 CwNum; //码字数目
    int32 ModScheme0;  //码字0 ModScheme
    int32 ModScheme1; //码字1 ModScheme
    float Rate[MAX_CW_NUM];  //码率
    UINT32 TBSize[MAX_CW_NUM];  //传输块长度
    UINT8 ModeType[MAX_CW_NUM];  //调制方式
    UINT8 ReTxFlag[MAX_CW_NUM];  //不同码字的重传指示
    UINT8 HarqIdx[MAX_CW_NUM];  //HARQ进程号
    UINT8 RV[MAX_CW_NUM];  //RV版本

    //int32 CoreSet_Num[MaxDCI_Period];
    //int32 CoreSet_StartSymbol[MAX_CORESET_NUM];
    //int32 CoreSet_Symb_Num[MAX_CORESET_NUM];    //{1,2,3}  3 onlyif N_RB_DL<=X
    //int32 PDCCH_AL[MAX_CORESET_NUM];
    //int32 PDCCH_m[MAX_CORESET_NUM];
    //int32 CoreSet_Mapping_Type[MAX_CORESET_NUM];   //CCE to REG mapping, 0: non-interleaving,  1: interleaving
    //// modified by 38.212 v2.0.0, 2018-01-18
    //int32 CoreSet_Interleaver_Size[MAX_CORESET_NUM];     // R value,(2,3,6)
    //int32 CoreSet_Shift_Index[MAX_CORESET_NUM];          // n_shift, f(cell_id) or [0,1,...,274]
    //int32 CoreSet_Precoder_Granularity[MAX_CORESET_NUM]; // CORESET or CCE_AL
    //// end of "modified by 38.212 v2.0.0, 2018-01-18"
    //int32 CoreSet_REG_bundle_size[MAX_CORESET_NUM];   //L value
    //int32 CoreSet_RB_Num[MAX_CORESET_NUM];
    //int32 CoreSet_RB_Assignment[MAX_CORESET_NUM][MAXRBNUM];
    //int32 PDCCH_Payload_K[MAX_CORESET_NUM];
    ////int32 CORESET_REG_bundle_Assignment[MAX_CORESET_NUM][MAX_REGBUNDLE_NUM][MAXRBNUM];

    //UINT8 DCI_Format_Type[MaxDCI_Period];
    //UINT8 PDSCH_StartSymbol[MaxDCI_Period];
    //UINT8 PDSCH_Symb_Len[MaxDCI_Period];
    //int32 RB_Assignment[MaxDCI_Period][MAXRBNUM];
    //int8 Antenna_ports[MaxDCI_Period];
    //int8 n_SCID[MaxDCI_Period];
    //int32 MCS0[MaxDCI_Period];
    //int32 MCS1[MaxDCI_Period];
    //int32 MIMO_MOD[MaxDCI_Period];
    //int32 CwNum[MaxDCI_Period];
    //int32 ModScheme0[MaxDCI_Period];
    //int32 ModScheme1[MaxDCI_Period];
    //float Rate[MaxDCI_Period][MAX_CW_NUM];
    //UINT32 TBSize[MaxDCI_Period][MAX_CW_NUM];
    //UINT8 ModeType[MaxDCI_Period][MAX_CW_NUM];
    //UINT8 ReTxFlag[MAX_CW_NUM];
    //UINT8 HarqIdx[MAX_CW_NUM];
    //UINT8 RV[MAX_CW_NUM];

    int32 TxNum;  //PDSCH发射天线端口数
    int32 CHE_Algo_Sel;  //CHE 算法选择（0：线性插值  1：MMSE插值）
    int32 Cell2UEDip;  //不同Cell到不同UE的路损，单位dB
    int32 ChannelType; //信道类型，参考38.901，注意EPA、EVA、ETU模型时DS_desired失效
    int32 DS_desired; //Scaling of delays，参考38.901
    int32 DopplerSpread; //最大多普勒扩展
    int32 TimeOffset; //时间偏移
    int32 UeFreqOffset;  //接收频偏Hz
    float UePhiInit;  //Ue初始相位
    float UePhiEnd;  //Ue下一Tti的初始相位
    int32 PDSCH_DMRS_Add_Pos;  //PDSCH DMRS额外符号个数，参考38.211
    int32 PDSCH_DMRS_TypeA_Pos; //第一个PDSCH DMRS符号位置
    UINT32 RBNum_FDFilter;
    float PrecodMat;
    UINT8 MuFlag;
    UINT8 PdschIntlvEn;
    UINT8 Pdcch_enable;
    int32 n_s;
    int32 n_s_f;
    int32 N_SCID_ID;
    int32 DMRSPorts[MAX_DMRS_PORT_NUM];
    int32 MuDMRSPorts[MAX_DMRS_PORT_NUM];
    int32 FrontDMRS_SYmbNum;  //前置DMRS的列数，取值范围为1或2
    int32 CDMGroupNum;
    int32 DMRSPortsNum;
    int32 MuDMRSPortsNum;
    int    MaxLayerNum; // maximum number of layers for one TB supported by ue for the serving cell, 38.212  ->5.4.2.1
    int    MaxQm;       // maximum modulation order configured for the serving cell
    int    MaxnPRB;     // maximum number of PRBs across all configured BWPs of a carrier
    int    I_LBRM;      // I_LBRM=1时，Ncb=min(N,Nref),else Ncb = N
    uint8   CBNotTransFlag[MAX_CW_NUM][MAX_CB_NUM];
} stUeCellParam;

typedef struct
{
    int32 CoreSet_Num[MaxDCI_Period]; //CoreSet个数，参考38.211
    int32 CoreSet_StartSymbol[MAX_CORESET_NUM];  //PDCCH起始符号，参考38.213
    int32 CoreSet_Symb_Num[MAX_CORESET_NUM];    //{1,2,3}  3 onlyif N_RB_DL<=X
    int32 PDCCH_AL[MAX_CORESET_NUM];  //PDCCH聚合等级
    int32 PDCCH_m[MAX_CORESET_NUM]; //PDCCH发射位置
    int32 PDCCH_Payload_K[MAX_CORESET_NUM]; //PDCCH Payload长度
    int32 CoreSet_Mapping_Type[MAX_CORESET_NUM];   //CCE to REG mapping, 0: non-interleaving,  1: interleaving
    // modified by 38.212 v2.0.0, 2018-01-18
    int32 CoreSet_Interleaver_Size[MAX_CORESET_NUM];     // R value,(2,3,6)
    int32 CoreSet_Shift_Index[MAX_CORESET_NUM];          // n_shift, f(cell_id) or [0,1,...,274]
    int32 CoreSet_Precoder_Granularity[MAX_CORESET_NUM]; // CORESET or CCE_AL
    // end of "modified by 38.212 v2.0.0, 2018-01-18"
    int32 CoreSet_REG_bundle_size[MAX_CORESET_NUM];   //L value
    int32 CoreSet_RB_Assignment[MAX_CORESET_NUM][MAXRBNUM]; //Coreset 的RB分配
    int32 CoreSet_RB_Num[MAX_CORESET_NUM];
    UINT8 DCI_Format_Type[MaxDCI_Period];  //下行DCI格式，0：Format1_0；1：Foramt1_1
    UINT8 PDSCH_StartSymbol[MaxDCI_Period]; //PDSCH起始符号，参考38.211(TBD)
    UINT8 PDSCH_Symb_Len[MaxDCI_Period];  //PDSCH符号长度，参考38.213
    int32 RB_Assignment[MAX_CORESET_NUM][MAXRBNUM];  //RB分配
    int32 RB_Num[MAX_CORESET_NUM];  //RB number
    int8 Antenna_ports[MaxDCI_Period]; //DCI Format1_1中的Antenna_ports域，用来指示CDM groups、DMRS ports、Front DMRS符号数
    int8 n_SCID[MaxDCI_Period]; //n_SCID，参考38.211
    int32 MCS0[MaxDCI_Period];
    int32 MCS1[MaxDCI_Period];
    int32 MIMO_MOD[MaxDCI_Period]; //MIMO模式
    int32 CwNum[MaxDCI_Period]; //码字数目
    int32 ModScheme0[MaxDCI_Period];  //码字0 ModScheme
    int32 ModScheme1[MaxDCI_Period]; //码字1 ModScheme
    float Rate[MaxDCI_Period][MAX_CW_NUM];  //码率
    UINT32 TBSize[MaxDCI_Period][MAX_CW_NUM]; //传输块长度
    UINT8 ModeType[MaxDCI_Period][MAX_CW_NUM]; //调制方式
} stUeCellParamPeriod;
typedef struct
{
    int32 UE_CSI_Idx[2];  //CSI-RS // temp
    int32 CSI_Feed_dalay;  //CSI反馈生效的时延（TTI个数）
    int32 CSI_PMIType;  //PMI反馈类型 0: type1 single panel 1:type1 multi panel 2:type2
    int32 CSI_N1;
    int32 CSI_Ng;
    int32 CSI_CodebookMode;  //PMI反馈 CodebookMode
    int32 CSI_Subbandsize;  //子带的RB个数
    int32 RxNum; //UE接收天线数
    int32 UEChanCorrInd; //UE天线相关性
    int32 RNTI; //识别号
    int32 UE_Mg;
    int32 UE_Ng;
    int32 UE_M;
    int32 UE_N;
    int32 UE_P;
    float UE_d_g_V;
    float UE_d_g_H;
    float UE_d_V;
    float UE_d_H;
    int32 UE_alfa;
    int32 UE_beta;
    int32 UE_gama;
} stUeParam;


typedef struct
{
    int32 RV[MAX_HARQ_NUM]; //RV版本
    int32 Crc[MAX_HARQ_NUM];
    int32 HarqCnt;
    int32 RetCnt[MAX_HARQ_NUM];
} stFeedPara;

typedef struct
{
    int32 mode;
    int32 AntennaPorts_value;  //天线端口值
    int32 RI;
    int32 PMI_type;  // 1: Type 1 single panel 2: Type 1 multi panel 3: Type 2
    int32 N1;
    int32 codebookindex;
    int32 i11;
    int32 i12;
    int32 i13;
    int32 i14;
    int32 i2;
} stFeedCsiPara;

typedef struct
{
    int32 iUe;
    int32 HarqIdx[MAX_CW_NUM]; //HARQ进程号
    int32 RV[MAX_CW_NUM]; //RV版本
    int32 ReTxFlag[MAX_CW_NUM]; //不同码字的重传指示
} stSimParam_FreqMap;

typedef struct
{
    int32 iUE;
    int32 SCS_UE;
    int32 SCS_Start_UE;
    int32 SCS_RbNum_UE;
    int32 iTTI;
    int32 iTTI_UE;
    int32 TTI_Num;  //TTI number
    int32 ReTxFlag[MAX_CW_NUM]; //不同码字的重传指示
    int32 CwLen[MAX_CW_NUM]; // 码字长度
    int32 pdsch_CwLen2Tbs[MAX_CW_NUM];
} stSimParam;
typedef struct
{
    real_t  Doppler;
    cmplx_t FAC[MAX_RX_ANT_NUM][TRS_N_FS];
    INT16   IRT;
    INT16   FrqOffset;
    cmplx_t RT[MAX_RX_ANT_NUM][MAXSYMNUM];
    real_t  NoisePow[MAX_RX_ANT_NUM];  //NoisePow
    real_t  RSRP[MAX_RX_ANT_NUM];
    int     RI;
} stCsiMea;
typedef struct
{
    int     RI;
    int     i11, i12, i13;
    int     i2[MAXRBNUM];
    int     codebook_index[MAXRBNUM];  //码本序号
} stCsiFeedback;


typedef struct
{
    UINT8  ucPucchDuration;
    UINT8  ucPucchDmrsNum;
    INT8   acDmrsIdx[4];
    UINT8  ucUciSetNum;
    INT8   ac1stUciSetIdx[8];
    INT8   ac2ndUciSetIdx[4];
    INT8   ac3rdUciSetIdx[4];

} stPucchParam;
//added zhangyanqun@20180903 for fpga pusch MT config para
typedef struct
{
    int  caseid;
    int IFFT_point;
    int   pusch_RA_type;     //0:type 0; 1:type 1,continuous
    int  pusch_RB_num;
    int   wave_form;    //0:DFT ; 1:cp
    int  modutype;  //0:pi/2 bpsk; 1:qpsk; 2:16qam 3:64QAM
    int dmrs_type;
    int RI;    //layer_num 1:1 layer
    int dmrs_port_idx[2];  //max two layer
    int dmrs_sym_num;
    int cdm_group_num_without_data;
    int port_num;
    int codebook_based;
    int tpmi;
    int dmrs_add_pos;
    int pusch_sym_num;
    int Harq_a_len;
    int csi_part1_len;
    int csi_part2_len;
} stPusch_tvParam;

#endif

